mirror of
https://git.mirrors.martin98.com/https://github.com/luc-github/ESP3D.git
synced 2025-08-04 07:40:38 +08:00
93312ff8b5
* Update WebSocket library * Update SSDP library * Update TFT_eSPI library * Update EspLuaEngine library * Update SDFat library * Change to pioarduino * Make ESP3DMessageFIFO and ESP3DMessage more thread safe * Fix sanity checks for BT * Add some C6 support * Refactor ethernet code * Split Ethernet Sta / WiFi sta ESP Commands and settings * Simplify wait and wdtFeed code * Set C3 with 4MB by default in platformio.ini * Apply Disable brown out only on ESP32 to avoid crash e.g:ESP32S3 * Add missing entries in platformio.ini
75 lines
2.8 KiB
C
75 lines
2.8 KiB
C
// -------------------------------------------------- //
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// This file is autogenerated by pioasm; do not edit! //
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// 8 + 16-bit SPI - no auto colour conversion //
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// -------------------------------------------------- //
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#pragma once
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#if !PICO_NO_HARDWARE
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#include "hardware/pio.h"
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#endif
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// ------ //
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// tft_io //
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// ------ //
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#define tft_io_wrap_target 27
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#define tft_io_wrap 31
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#define tft_io_offset_start_8 0u
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#define tft_io_offset_set_addr_window 3u
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#define tft_io_offset_block_fill 17u
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#define tft_io_offset_start_tx 27u
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static const uint16_t tft_io_program_instructions[] = {
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0x90a0, // 0: pull block side 0
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0x6019, // 1: out pins, 25
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0x181e, // 2: jmp 30 side 1
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0xf022, // 3: set x, 2 side 0
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0xe000, // 4: set pins, 0
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0x90a0, // 5: pull block side 0
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0x6019, // 6: out pins, 25
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0xb842, // 7: nop side 1
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0x7001, // 8: out pins, 1 side 0
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0x18e8, // 9: jmp !osre, 8 side 1
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0xf001, // 10: set pins, 1 side 0
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0x003b, // 11: jmp !x, 27
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0x80a0, // 12: pull block
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0x7001, // 13: out pins, 1 side 0
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0x18ed, // 14: jmp !osre, 13 side 1
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0x1044, // 15: jmp x--, 4 side 0
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0x001b, // 16: jmp 27
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0x90a0, // 17: pull block side 0
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0xa027, // 18: mov x, osr
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0x80a0, // 19: pull block
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0xa047, // 20: mov y, osr
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0xb0e1, // 21: mov osr, x side 0
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0x7011, // 22: out pins, 17 side 0
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0xb842, // 23: nop side 1
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0x7001, // 24: out pins, 1 side 0
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0x18f8, // 25: jmp !osre, 24 side 1
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0x1095, // 26: jmp y--, 21 side 0
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// .wrap_target
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0x90a0, // 27: pull block side 0
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0x7011, // 28: out pins, 17 side 0
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0xb842, // 29: nop side 1
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0x7001, // 30: out pins, 1 side 0
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0x18fe, // 31: jmp !osre, 30 side 1
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// .wrap
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};
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#if !PICO_NO_HARDWARE
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static const struct pio_program tft_io_program = {
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.instructions = tft_io_program_instructions,
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.length = 32,
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.origin = -1,
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};
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static inline pio_sm_config tft_io_program_get_default_config(uint offset) {
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pio_sm_config c = pio_get_default_sm_config();
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sm_config_set_wrap(&c, offset + tft_io_wrap_target, offset + tft_io_wrap);
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sm_config_set_sideset(&c, 2, true, false);
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return c;
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}
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#endif
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