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https://gitlab.com/libeigen/eigen.git
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Merged eigen/eigen into default
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commit
0a6ae41555
@ -15,7 +15,7 @@ namespace Eigen {
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namespace internal {
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namespace internal {
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// Most of the following operations require arch >= 3.0
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// Most of the following operations require arch >= 3.0
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#if defined(EIGEN_HAS_CUDA_FP16) && defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 300
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#if defined(EIGEN_HAS_CUDA_FP16) && defined(__CUDACC__) && defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 300
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template<> struct is_arithmetic<half2> { enum { value = true }; };
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template<> struct is_arithmetic<half2> { enum { value = true }; };
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@ -38,7 +38,9 @@ struct traits<TensorEvalToOp<XprType, MakePointer_> >
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};
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};
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template <class T>
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template <class T>
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struct MakePointer {
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struct MakePointer {
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typedef typename MakePointer_<T>::Type Type;
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// Intermediate typedef to workaround MSVC issue.
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typedef MakePointer_<T> MakePointerT;
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typedef typename MakePointerT::Type Type;
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};
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};
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};
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};
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@ -42,9 +42,10 @@ struct traits<TensorForcedEvalOp<XprType, MakePointer_> >
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enum {
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enum {
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Flags = 0
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Flags = 0
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};
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};
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template <class T>
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template <class T> struct MakePointer {
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struct MakePointer {
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// Intermediate typedef to workaround MSVC issue.
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typedef typename MakePointer_<T>::Type Type;
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typedef MakePointer_<T> MakePointerT;
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typedef typename MakePointerT::Type Type;
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};
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};
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};
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};
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@ -142,16 +142,16 @@ struct eval<const TensorFixedSize<Scalar_, Dimensions, Options, IndexType_>, Eig
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typedef const TensorFixedSize<Scalar_, Dimensions, Options, IndexType_>& type;
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typedef const TensorFixedSize<Scalar_, Dimensions, Options, IndexType_>& type;
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};
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};
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template<typename PlainObjectType, int Options>
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template<typename PlainObjectType, int Options, template <class> class MakePointer>
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struct eval<TensorMap<PlainObjectType, Options>, Eigen::Dense>
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struct eval<TensorMap<PlainObjectType, Options, MakePointer>, Eigen::Dense>
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{
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{
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typedef const TensorMap<PlainObjectType, Options>& type;
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typedef const TensorMap<PlainObjectType, Options, MakePointer>& type;
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};
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};
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template<typename PlainObjectType, int Options>
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template<typename PlainObjectType, int Options, template <class> class MakePointer>
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struct eval<const TensorMap<PlainObjectType, Options>, Eigen::Dense>
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struct eval<const TensorMap<PlainObjectType, Options, MakePointer>, Eigen::Dense>
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{
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{
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typedef const TensorMap<PlainObjectType, Options>& type;
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typedef const TensorMap<PlainObjectType, Options, MakePointer>& type;
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};
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};
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template<typename PlainObjectType>
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template<typename PlainObjectType>
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@ -197,16 +197,16 @@ struct nested<const TensorFixedSize<Scalar_, Dimensions, Options, IndexType_> >
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};
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};
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template <typename PlainObjectType, int Options>
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template <typename PlainObjectType, int Options, template <class> class MakePointer>
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struct nested<TensorMap<PlainObjectType, Options> >
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struct nested<TensorMap<PlainObjectType, Options, MakePointer> >
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{
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{
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typedef const TensorMap<PlainObjectType, Options>& type;
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typedef const TensorMap<PlainObjectType, Options, MakePointer>& type;
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};
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};
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template <typename PlainObjectType, int Options>
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template <typename PlainObjectType, int Options, template <class> class MakePointer>
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struct nested<const TensorMap<PlainObjectType, Options> >
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struct nested<const TensorMap<PlainObjectType, Options, MakePointer> >
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{
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{
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typedef const TensorMap<PlainObjectType, Options>& type;
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typedef const TensorMap<PlainObjectType, Options, MakePointer>& type;
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};
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};
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template <typename PlainObjectType>
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template <typename PlainObjectType>
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@ -69,7 +69,7 @@ void test_cuda_contraction(int m_size, int k_size, int n_size)
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t_result = t_left.contract(t_right, dims);
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t_result = t_left.contract(t_right, dims);
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cudaMemcpy(t_result_gpu.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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cudaMemcpy(t_result_gpu.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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for (size_t i = 0; i < t_result.size(); i++) {
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for (DenseIndex i = 0; i < t_result.size(); i++) {
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if (fabs(t_result(i) - t_result_gpu(i)) < 1e-4f) {
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if (fabs(t_result(i) - t_result_gpu(i)) < 1e-4f) {
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continue;
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continue;
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}
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}
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@ -303,8 +303,8 @@ void test_cuda_contraction()
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cudaMemcpy(t_result.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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cudaMemcpy(t_result.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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for (size_t i = 0; i < t_result.dimensions().TotalSize(); i++) {
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for (DenseIndex i = 0; i < t_result.size(); i++) {
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if (fabs(t_result.data()[i] - m_result.data()[i]) >= 1e-4) {
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if (fabs(t_result.data()[i] - m_result.data()[i]) >= 1e-4f) {
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std::cout << "mismatch detected at index " << i << ": " << t_result.data()[i] << " vs " << m_result.data()[i] << std::endl;
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std::cout << "mismatch detected at index " << i << ": " << t_result.data()[i] << " vs " << m_result.data()[i] << std::endl;
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assert(false);
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assert(false);
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}
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}
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@ -13,7 +13,7 @@
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using Eigen::Tensor;
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using Eigen::Tensor;
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static void test_simple_patch()
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void test_simple_patch()
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{
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{
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Tensor<float, 4> tensor(2,3,5,7);
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Tensor<float, 4> tensor(2,3,5,7);
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tensor.setRandom();
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tensor.setRandom();
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@ -180,7 +180,7 @@ static void test_simple_patch()
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}
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}
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// Verifies VALID padding (no padding) with incrementing values.
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// Verifies VALID padding (no padding) with incrementing values.
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static void test_patch_padding_valid()
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void test_patch_padding_valid()
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{
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{
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int input_depth = 3;
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int input_depth = 3;
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int input_rows = 3;
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int input_rows = 3;
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@ -256,7 +256,7 @@ static void test_patch_padding_valid()
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}
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}
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// Verifies VALID padding (no padding) with the same value.
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// Verifies VALID padding (no padding) with the same value.
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static void test_patch_padding_valid_same_value()
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void test_patch_padding_valid_same_value()
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{
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{
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int input_depth = 1;
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int input_depth = 1;
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int input_rows = 5;
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int input_rows = 5;
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@ -329,7 +329,7 @@ static void test_patch_padding_valid_same_value()
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}
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}
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// Verifies SAME padding.
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// Verifies SAME padding.
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static void test_patch_padding_same()
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void test_patch_padding_same()
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{
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{
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int input_depth = 3;
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int input_depth = 3;
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int input_rows = 4;
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int input_rows = 4;
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@ -405,7 +405,7 @@ static void test_patch_padding_same()
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}
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}
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}
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}
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static void test_patch_no_extra_dim()
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void test_patch_no_extra_dim()
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{
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{
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Tensor<float, 3> tensor(2,3,5);
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Tensor<float, 3> tensor(2,3,5);
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tensor.setRandom();
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tensor.setRandom();
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@ -553,7 +553,7 @@ static void test_patch_no_extra_dim()
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}
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}
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}
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}
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static void test_imagenet_patches()
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void test_imagenet_patches()
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{
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{
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// Test the code on typical configurations used by the 'imagenet' benchmarks at
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// Test the code on typical configurations used by the 'imagenet' benchmarks at
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// https://github.com/soumith/convnet-benchmarks
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// https://github.com/soumith/convnet-benchmarks
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@ -748,10 +748,10 @@ static void test_imagenet_patches()
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void test_cxx11_tensor_image_patch()
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void test_cxx11_tensor_image_patch()
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{
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{
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CALL_SUBTEST(test_simple_patch());
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CALL_SUBTEST_1(test_simple_patch());
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CALL_SUBTEST(test_patch_no_extra_dim());
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CALL_SUBTEST_2(test_patch_no_extra_dim());
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CALL_SUBTEST(test_patch_padding_valid());
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CALL_SUBTEST_3(test_patch_padding_valid());
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CALL_SUBTEST(test_patch_padding_valid_same_value());
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CALL_SUBTEST_4(test_patch_padding_valid_same_value());
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CALL_SUBTEST(test_patch_padding_same());
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CALL_SUBTEST_5(test_patch_padding_same());
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CALL_SUBTEST(test_imagenet_patches());
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CALL_SUBTEST_6(test_imagenet_patches());
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}
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}
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@ -55,7 +55,7 @@ void test_cuda_cumsum(int m_size, int k_size, int n_size)
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t_result = t_input.cumsum(1);
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t_result = t_input.cumsum(1);
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cudaMemcpy(t_result_gpu.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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cudaMemcpy(t_result_gpu.data(), d_t_result, t_result_bytes, cudaMemcpyDeviceToHost);
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for (size_t i = 0; i < t_result.size(); i++) {
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for (DenseIndex i = 0; i < t_result.size(); i++) {
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if (fabs(t_result(i) - t_result_gpu(i)) < 1e-4f) {
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if (fabs(t_result(i) - t_result_gpu(i)) < 1e-4f) {
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continue;
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continue;
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}
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}
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