GitHub-Proxy/eigen
1
0
Fork 0
mirror of https://gitlab.com/libeigen/eigen.git synced 2025-09-23 14:53:13 +08:00
Code Issues Packages Projects Releases Wiki Activity

Adding TensorChippingOP for sycl backend; fixing the index value in the verification operation for cxx11_tensorChipping.cpp test

Browse Source
This commit is contained in:
Mehdi Goli 2017-02-13 17:25:12 +00:00
parent fad776492f
commit 0d153ded29
10 changed files with 732 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
unsupported/Eigen/CXX11/src/Tensor/TensorChipping.h
View File

@ -150,7 +150,7 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
}; };
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE TensorEvaluator(const XprType& op, const Device& device) EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE TensorEvaluator(const XprType& op, const Device& device)
: m_impl(op.expression(), device), m_dim(op.dim()), m_device(device) : m_impl(op.expression(), device), m_dim(op.dim()), m_device(device), m_offset(op.offset())
{ {
EIGEN_STATIC_ASSERT((NumInputDims >= 1), YOU_MADE_A_PROGRAMMING_MISTAKE); EIGEN_STATIC_ASSERT((NumInputDims >= 1), YOU_MADE_A_PROGRAMMING_MISTAKE);
eigen_assert(NumInputDims > m_dim.actualDim()); eigen_assert(NumInputDims > m_dim.actualDim());
@ -274,6 +274,18 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
} }
} }
/// used by sycl
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE DenseIndex dimId() const {
return m_dim.actualDim();
}
/// used by sycl
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE const DenseIndex& offset() const {
return m_offset;
}
/// required by sycl in order to extract the accessor
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE const TensorEvaluator<ArgType, Device>& impl() const { return m_impl; }
protected: protected:
EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE Index srcCoeff(Index index) const EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE Index srcCoeff(Index index) const
{ {
@ -304,6 +316,9 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
TensorEvaluator<ArgType, Device> m_impl; TensorEvaluator<ArgType, Device> m_impl;
const internal::DimensionId<DimId> m_dim; const internal::DimensionId<DimId> m_dim;
const Device& m_device; const Device& m_device;
// required by sycl
const DenseIndex m_offset;
}; };

12
unsupported/Eigen/CXX11/src/Tensor/TensorSyclConvertToDeviceExpression.h
View File

@ -146,6 +146,18 @@ KERNELBROKERCONVERTERSLICESTRIDEOP()
#undef KERNELBROKERCONVERTERSLICESTRIDEOP #undef KERNELBROKERCONVERTERSLICESTRIDEOP
/// specialisation of the \ref ConvertToDeviceExpression struct when the node type is TensorChippingOp
#define KERNELBROKERCONVERTCHIPPINGOP(CVQual)\
template <DenseIndex DimId, typename Expr>\
struct ConvertToDeviceExpression<CVQual TensorChippingOp<DimId, Expr> > {\
typedef CVQual TensorChippingOp<DimId, typename ConvertToDeviceExpression<Expr>::Type> Type;\
};
KERNELBROKERCONVERTCHIPPINGOP(const)
KERNELBROKERCONVERTCHIPPINGOP()
#undef KERNELBROKERCONVERTCHIPPINGOP
} // namespace internal } // namespace internal
} // namespace TensorSycl } // namespace TensorSycl
} // namespace Eigen } // namespace Eigen

17
unsupported/Eigen/CXX11/src/Tensor/TensorSyclExprConstructor.h
View File

@ -368,6 +368,23 @@ SYCLPADDINGOPEXPRCONST(TensorPaddingOp, )
#undef SYCLPADDINGOPEXPRCONST #undef SYCLPADDINGOPEXPRCONST
// TensorChippingOp
#define SYCLTENSORCHIPPINGOPEXPR(CVQual)\
template<DenseIndex DimId, typename OrigXprType, typename XprType, typename... Params>\
struct ExprConstructor<CVQual TensorChippingOp <DimId, OrigXprType> , CVQual TensorChippingOp<DimId, XprType>, Params... >{\
typedef ExprConstructor<OrigXprType, XprType, Params...> my_xpr_type;\
typedef CVQual TensorChippingOp<DimId, typename my_xpr_type::Type> Type;\
my_xpr_type xprExpr;\
Type expr;\
template <typename FuncDetector>\
ExprConstructor(FuncDetector &funcD, const utility::tuple::Tuple<Params...> &t)\
: xprExpr(funcD.xprExpr, t), expr(xprExpr.expr, funcD.offset(), funcD.dimId()) {}\
};
SYCLTENSORCHIPPINGOPEXPR(const)
SYCLTENSORCHIPPINGOPEXPR()
#undef SYCLTENSORCHIPPINGOPEXPR
/// template deduction for \ref ExprConstructor struct /// template deduction for \ref ExprConstructor struct
template <typename OrigExpr, typename IndexExpr, typename FuncD, typename... Params> template <typename OrigExpr, typename IndexExpr, typename FuncD, typename... Params>

15
unsupported/Eigen/CXX11/src/Tensor/TensorSyclExtractAccessor.h
View File

@ -200,7 +200,7 @@ SYCLSLICEOPEXTACC(const)
SYCLSLICEOPEXTACC() SYCLSLICEOPEXTACC()
#undef SYCLSLICEOPEXTACC #undef SYCLSLICEOPEXTACC
// specialisation of the \ref ExtractAccessor struct when the node type is // specialisation of the \ref ExtractAccessor struct when the node type is
/// const TensorStridingSlicingOp. /// TensorStridingSlicingOp.
#define SYCLSLICESTRIDEOPEXTACC(CVQual)\ #define SYCLSLICESTRIDEOPEXTACC(CVQual)\
template<typename StartIndices, typename StopIndices, typename Strides, typename XprType, typename Dev>\ template<typename StartIndices, typename StopIndices, typename Strides, typename XprType, typename Dev>\
struct ExtractAccessor<TensorEvaluator<CVQual TensorStridingSlicingOp<StartIndices, StopIndices, Strides, XprType>, Dev> >{\ struct ExtractAccessor<TensorEvaluator<CVQual TensorStridingSlicingOp<StartIndices, StopIndices, Strides, XprType>, Dev> >{\
@ -212,6 +212,19 @@ SYCLSLICESTRIDEOPEXTACC(const)
SYCLSLICESTRIDEOPEXTACC() SYCLSLICESTRIDEOPEXTACC()
#undef SYCLSLICESTRIDEOPEXTACC #undef SYCLSLICESTRIDEOPEXTACC
// specialisation of the \ref ExtractAccessor struct when the node type is
/// TensorChippingOp.
#define SYCLTENSORCHIPPINGOPEXTACC(CVQual)\
template<DenseIndex DimId, typename XprType, typename Dev>\
struct ExtractAccessor<TensorEvaluator<CVQual TensorChippingOp<DimId, XprType>, Dev> >{\
static inline auto getTuple(cl::sycl::handler& cgh, const TensorEvaluator<CVQual TensorChippingOp<DimId, XprType>, Dev>& eval)\
RETURN_CPP11(AccessorConstructor::getTuple(cgh, eval.impl()))\
};
SYCLTENSORCHIPPINGOPEXTACC(const)
SYCLTENSORCHIPPINGOPEXTACC()
#undef SYCLTENSORCHIPPINGOPEXTACC
/// template deduction for \ref ExtractAccessor /// template deduction for \ref ExtractAccessor
template <typename Evaluator> template <typename Evaluator>

16
unsupported/Eigen/CXX11/src/Tensor/TensorSyclExtractFunctors.h
View File

@ -290,6 +290,22 @@ SYCLEXTRFUNCCONTRACTCONCAT(TensorConcatenationOp, axis(), const)
SYCLEXTRFUNCCONTRACTCONCAT(TensorConcatenationOp, axis(),) SYCLEXTRFUNCCONTRACTCONCAT(TensorConcatenationOp, axis(),)
#undef SYCLEXTRFUNCCONTRACTCONCAT #undef SYCLEXTRFUNCCONTRACTCONCAT
//TensorChippingOp
#define SYCLEXTRFUNCCHIPPINGOP(CVQual)\
template<DenseIndex DimId, typename XprType, typename Device>\
struct FunctorExtractor<TensorEvaluator<CVQual TensorChippingOp<DimId, XprType>, Device>>{\
FunctorExtractor<Eigen::TensorEvaluator<XprType, Device> > xprExpr;\
const DenseIndex m_dim;\
const DenseIndex m_offset;\
EIGEN_STRONG_INLINE const DenseIndex& dimId() const { return m_dim; }\
EIGEN_STRONG_INLINE const DenseIndex& offset() const { return m_offset; }\
FunctorExtractor(const TensorEvaluator<CVQual TensorChippingOp<DimId, XprType>, Device>& expr)\
: xprExpr(expr.impl()), m_dim(expr.dimId()), m_offset(expr.offset()) {}\
};
SYCLEXTRFUNCCHIPPINGOP(const)
SYCLEXTRFUNCCHIPPINGOP()
#undef SYCLEXTRFUNCCHIPPINGOP
/// template deduction function for FunctorExtractor /// template deduction function for FunctorExtractor
template <typename Evaluator> template <typename Evaluator>

11
unsupported/Eigen/CXX11/src/Tensor/TensorSyclLeafCount.h
View File

@ -139,6 +139,17 @@ SLICEOPLEAFCOUNT(const)
SLICEOPLEAFCOUNT() SLICEOPLEAFCOUNT()
#undef SLICEOPLEAFCOUNT #undef SLICEOPLEAFCOUNT
/// specialisation of the \ref LeafCount struct when the node type is TensorChippingOp
#define CHIPPINGOPLEAFCOUNT(CVQual)\
template <DenseIndex DimId, typename XprType>\
struct LeafCount<CVQual TensorChippingOp<DimId, XprType> >:CategoryCount<XprType>{};
CHIPPINGOPLEAFCOUNT(const)
CHIPPINGOPLEAFCOUNT()
#undef CHIPPINGOPLEAFCOUNT
#define SLICESTRIDEOPLEAFCOUNT(CVQual)\ #define SLICESTRIDEOPLEAFCOUNT(CVQual)\
template<typename StartIndices, typename StopIndices, typename Strides, typename XprType>\ template<typename StartIndices, typename StopIndices, typename Strides, typename XprType>\
struct LeafCount<CVQual TensorStridingSlicingOp<StartIndices, StopIndices, Strides, XprType> >:CategoryCount<XprType>{}; struct LeafCount<CVQual TensorStridingSlicingOp<StartIndices, StopIndices, Strides, XprType> >:CategoryCount<XprType>{};

12
unsupported/Eigen/CXX11/src/Tensor/TensorSyclPlaceHolderExpr.h
View File

@ -156,6 +156,18 @@ EVALTO()
#undef EVALTO #undef EVALTO
/// specialisation of the \ref PlaceHolderExpression when the node is
/// TensorChippingOp
#define CHIPPINGOP(CVQual)\
template <DenseIndex DimId, typename Expr, size_t N>\
struct PlaceHolderExpression<CVQual TensorChippingOp<DimId, Expr>, N> {\
typedef CVQual TensorChippingOp< DimId, typename CalculateIndex <N, Expr>::ArgType> Type;\
};
CHIPPINGOP(const)
CHIPPINGOP()
#undef CHIPPINGOP
/// specialisation of the \ref PlaceHolderExpression when the node is /// specialisation of the \ref PlaceHolderExpression when the node is
/// TensorReductionOp /// TensorReductionOp
#define SYCLREDUCTION(CVQual)\ #define SYCLREDUCTION(CVQual)\

1
unsupported/test/CMakeLists.txt
View File

@ -166,6 +166,7 @@ if(EIGEN_TEST_CXX11)
ei_add_test_sycl(cxx11_tensor_reverse_sycl "-std=c++11") ei_add_test_sycl(cxx11_tensor_reverse_sycl "-std=c++11")
ei_add_test_sycl(cxx11_tensor_convolution_sycl "-std=c++11") ei_add_test_sycl(cxx11_tensor_convolution_sycl "-std=c++11")
ei_add_test_sycl(cxx11_tensor_striding_sycl "-std=c++11") ei_add_test_sycl(cxx11_tensor_striding_sycl "-std=c++11")
ei_add_test_sycl(cxx11_tensor_chipping_sycl "-std=c++11")
endif(EIGEN_TEST_SYCL) endif(EIGEN_TEST_SYCL)
# It should be safe to always run these tests as there is some fallback code for # It should be safe to always run these tests as there is some fallback code for
# older compiler that don't support cxx11. # older compiler that don't support cxx11.

8
unsupported/test/cxx11_tensor_chipping.cpp
View File

@ -43,7 +43,7 @@ static void test_simple_chip()
VERIFY_IS_EQUAL(chip2.dimension(2), 7); VERIFY_IS_EQUAL(chip2.dimension(2), 7);
VERIFY_IS_EQUAL(chip2.dimension(3), 11); VERIFY_IS_EQUAL(chip2.dimension(3), 11);
for (int i = 0; i < 2; ++i) { for (int i = 0; i < 2; ++i) {
for (int j = 0; j < 3; ++j) { for (int j = 0; j < 5; ++j) {
for (int k = 0; k < 7; ++k) { for (int k = 0; k < 7; ++k) {
for (int l = 0; l < 11; ++l) { for (int l = 0; l < 11; ++l) {
VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1,j,k,l)); VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1,j,k,l));
@ -75,7 +75,7 @@ static void test_simple_chip()
for (int i = 0; i < 2; ++i) { for (int i = 0; i < 2; ++i) {
for (int j = 0; j < 3; ++j) { for (int j = 0; j < 3; ++j) {
for (int k = 0; k < 5; ++k) { for (int k = 0; k < 5; ++k) {
for (int l = 0; l < 7; ++l) { for (int l = 0; l < 11; ++l) {
VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5,l)); VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5,l));
} }
} }
@ -126,7 +126,7 @@ static void test_dynamic_chip()
VERIFY_IS_EQUAL(chip2.dimension(2), 7); VERIFY_IS_EQUAL(chip2.dimension(2), 7);
VERIFY_IS_EQUAL(chip2.dimension(3), 11); VERIFY_IS_EQUAL(chip2.dimension(3), 11);
for (int i = 0; i < 2; ++i) { for (int i = 0; i < 2; ++i) {
for (int j = 0; j < 3; ++j) { for (int j = 0; j < 5; ++j) {
for (int k = 0; k < 7; ++k) { for (int k = 0; k < 7; ++k) {
for (int l = 0; l < 11; ++l) { for (int l = 0; l < 11; ++l) {
VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1,j,k,l)); VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1,j,k,l));
@ -158,7 +158,7 @@ static void test_dynamic_chip()
for (int i = 0; i < 2; ++i) { for (int i = 0; i < 2; ++i) {
for (int j = 0; j < 3; ++j) { for (int j = 0; j < 3; ++j) {
for (int k = 0; k < 5; ++k) { for (int k = 0; k < 5; ++k) {
for (int l = 0; l < 7; ++l) { for (int l = 0; l < 11; ++l) {
VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5,l)); VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5,l));
} }
} }

622
unsupported/test/cxx11_tensor_chipping_sycl.cpp Normal file
View File

@ -0,0 +1,622 @@
// This file is part of Eigen, a lightweight C++ template library
// for linear algebra.
//
// Copyright (C) 2016
// Mehdi Goli Codeplay Software Ltd.
// Ralph Potter Codeplay Software Ltd.
// Luke Iwanski Codeplay Software Ltd.
// Contact: <eigen@codeplay.com>
// Benoit Steiner <benoit.steiner.goog@gmail.com>
//
// This Source Code Form is subject to the terms of the Mozilla
// Public License v. 2.0. If a copy of the MPL was not distributed
// with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
#define EIGEN_TEST_NO_LONGDOUBLE
#define EIGEN_TEST_NO_COMPLEX
#define EIGEN_TEST_FUNC cxx11_tensor_chipping_sycl
#define EIGEN_DEFAULT_DENSE_INDEX_TYPE int64_t
#define EIGEN_USE_SYCL
#include "main.h"
#include <Eigen/CXX11/Tensor>
using Eigen::Tensor;
template <typename DataType, int DataLayout, typename IndexType>
static void test_static_chip_sycl(const Eigen::SyclDevice& sycl_device)
{
IndexType sizeDim1 = 2;
IndexType sizeDim2 = 3;
IndexType sizeDim3 = 5;
IndexType sizeDim4 = 7;
IndexType sizeDim5 = 11;
array<IndexType, 5> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
array<IndexType, 4> chip1TensorRange = {{sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 5, DataLayout,IndexType> tensor(tensorRange);
Tensor<DataType, 4, DataLayout,IndexType> chip1(chip1TensorRange);
tensor.setRandom();
const size_t tensorBuffSize =tensor.size()*sizeof(DataType);
const size_t chip1TensorBuffSize =chip1.size()*sizeof(DataType);
DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
DataType* gpu_data_chip1 = static_cast<DataType*>(sycl_device.allocate(chip1TensorBuffSize));
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange);
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip1(gpu_data_chip1, chip1TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_tensor, tensor.data(), tensorBuffSize);
gpu_chip1.device(sycl_device)=gpu_tensor.template chip<0l>(1l);
sycl_device.memcpyDeviceToHost(chip1.data(), gpu_data_chip1, chip1TensorBuffSize);
VERIFY_IS_EQUAL(chip1.dimension(0), sizeDim2);
VERIFY_IS_EQUAL(chip1.dimension(1), sizeDim3);
VERIFY_IS_EQUAL(chip1.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip1.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim2; ++i) {
for (IndexType j = 0; j < sizeDim3; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip1(i,j,k,l), tensor(1l,i,j,k,l));
}
}
}
}
array<IndexType, 4> chip2TensorRange = {{sizeDim1, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip2(chip2TensorRange);
const size_t chip2TensorBuffSize =chip2.size()*sizeof(DataType);
DataType* gpu_data_chip2 = static_cast<DataType*>(sycl_device.allocate(chip2TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip2(gpu_data_chip2, chip2TensorRange);
gpu_chip2.device(sycl_device)=gpu_tensor.template chip<1l>(1l);
sycl_device.memcpyDeviceToHost(chip2.data(), gpu_data_chip2, chip2TensorBuffSize);
VERIFY_IS_EQUAL(chip2.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip2.dimension(1), sizeDim3);
VERIFY_IS_EQUAL(chip2.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip2.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim3; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1l,j,k,l));
}
}
}
}
array<IndexType, 4> chip3TensorRange = {{sizeDim1, sizeDim2, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip3(chip3TensorRange);
const size_t chip3TensorBuffSize =chip3.size()*sizeof(DataType);
DataType* gpu_data_chip3 = static_cast<DataType*>(sycl_device.allocate(chip3TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip3(gpu_data_chip3, chip3TensorRange);
gpu_chip3.device(sycl_device)=gpu_tensor.template chip<2l>(2l);
sycl_device.memcpyDeviceToHost(chip3.data(), gpu_data_chip3, chip3TensorBuffSize);
VERIFY_IS_EQUAL(chip3.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip3.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip3.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip3.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip3(i,j,k,l), tensor(i,j,2l,k,l));
}
}
}
}
array<IndexType, 4> chip4TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip4(chip4TensorRange);
const size_t chip4TensorBuffSize =chip4.size()*sizeof(DataType);
DataType* gpu_data_chip4 = static_cast<DataType*>(sycl_device.allocate(chip4TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip4(gpu_data_chip4, chip4TensorRange);
gpu_chip4.device(sycl_device)=gpu_tensor.template chip<3l>(5l);
sycl_device.memcpyDeviceToHost(chip4.data(), gpu_data_chip4, chip4TensorBuffSize);
VERIFY_IS_EQUAL(chip4.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip4.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip4.dimension(2), sizeDim3);
VERIFY_IS_EQUAL(chip4.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim3; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5l,l));
}
}
}
}
array<IndexType, 4> chip5TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4}};
Tensor<DataType, 4, DataLayout,IndexType> chip5(chip5TensorRange);
const size_t chip5TensorBuffSize =chip5.size()*sizeof(DataType);
DataType* gpu_data_chip5 = static_cast<DataType*>(sycl_device.allocate(chip5TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip5(gpu_data_chip5, chip5TensorRange);
gpu_chip5.device(sycl_device)=gpu_tensor.template chip<4l>(7l);
sycl_device.memcpyDeviceToHost(chip5.data(), gpu_data_chip5, chip5TensorBuffSize);
VERIFY_IS_EQUAL(chip5.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip5.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip5.dimension(2), sizeDim3);
VERIFY_IS_EQUAL(chip5.dimension(3), sizeDim4);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim3; ++k) {
for (IndexType l = 0; l < sizeDim4; ++l) {
VERIFY_IS_EQUAL(chip5(i,j,k,l), tensor(i,j,k,l,7l));
}
}
}
}
sycl_device.deallocate(gpu_data_tensor);
sycl_device.deallocate(gpu_data_chip1);
sycl_device.deallocate(gpu_data_chip2);
sycl_device.deallocate(gpu_data_chip3);
sycl_device.deallocate(gpu_data_chip4);
sycl_device.deallocate(gpu_data_chip5);
}
template <typename DataType, int DataLayout, typename IndexType>
static void test_dynamic_chip_sycl(const Eigen::SyclDevice& sycl_device)
{
IndexType sizeDim1 = 2;
IndexType sizeDim2 = 3;
IndexType sizeDim3 = 5;
IndexType sizeDim4 = 7;
IndexType sizeDim5 = 11;
array<IndexType, 5> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
array<IndexType, 4> chip1TensorRange = {{sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 5, DataLayout,IndexType> tensor(tensorRange);
Tensor<DataType, 4, DataLayout,IndexType> chip1(chip1TensorRange);
tensor.setRandom();
const size_t tensorBuffSize =tensor.size()*sizeof(DataType);
const size_t chip1TensorBuffSize =chip1.size()*sizeof(DataType);
DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
DataType* gpu_data_chip1 = static_cast<DataType*>(sycl_device.allocate(chip1TensorBuffSize));
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange);
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip1(gpu_data_chip1, chip1TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_tensor, tensor.data(), tensorBuffSize);
gpu_chip1.device(sycl_device)=gpu_tensor.chip(1l,0l);
sycl_device.memcpyDeviceToHost(chip1.data(), gpu_data_chip1, chip1TensorBuffSize);
VERIFY_IS_EQUAL(chip1.dimension(0), sizeDim2);
VERIFY_IS_EQUAL(chip1.dimension(1), sizeDim3);
VERIFY_IS_EQUAL(chip1.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip1.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim2; ++i) {
for (IndexType j = 0; j < sizeDim3; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip1(i,j,k,l), tensor(1l,i,j,k,l));
}
}
}
}
array<IndexType, 4> chip2TensorRange = {{sizeDim1, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip2(chip2TensorRange);
const size_t chip2TensorBuffSize =chip2.size()*sizeof(DataType);
DataType* gpu_data_chip2 = static_cast<DataType*>(sycl_device.allocate(chip2TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip2(gpu_data_chip2, chip2TensorRange);
gpu_chip2.device(sycl_device)=gpu_tensor.chip(1l,1l);
sycl_device.memcpyDeviceToHost(chip2.data(), gpu_data_chip2, chip2TensorBuffSize);
VERIFY_IS_EQUAL(chip2.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip2.dimension(1), sizeDim3);
VERIFY_IS_EQUAL(chip2.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip2.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim3; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip2(i,j,k,l), tensor(i,1l,j,k,l));
}
}
}
}
array<IndexType, 4> chip3TensorRange = {{sizeDim1, sizeDim2, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip3(chip3TensorRange);
const size_t chip3TensorBuffSize =chip3.size()*sizeof(DataType);
DataType* gpu_data_chip3 = static_cast<DataType*>(sycl_device.allocate(chip3TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip3(gpu_data_chip3, chip3TensorRange);
gpu_chip3.device(sycl_device)=gpu_tensor.chip(2l,2l);
sycl_device.memcpyDeviceToHost(chip3.data(), gpu_data_chip3, chip3TensorBuffSize);
VERIFY_IS_EQUAL(chip3.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip3.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip3.dimension(2), sizeDim4);
VERIFY_IS_EQUAL(chip3.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim4; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip3(i,j,k,l), tensor(i,j,2l,k,l));
}
}
}
}
array<IndexType, 4> chip4TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> chip4(chip4TensorRange);
const size_t chip4TensorBuffSize =chip4.size()*sizeof(DataType);
DataType* gpu_data_chip4 = static_cast<DataType*>(sycl_device.allocate(chip4TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip4(gpu_data_chip4, chip4TensorRange);
gpu_chip4.device(sycl_device)=gpu_tensor.chip(5l,3l);
sycl_device.memcpyDeviceToHost(chip4.data(), gpu_data_chip4, chip4TensorBuffSize);
VERIFY_IS_EQUAL(chip4.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip4.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip4.dimension(2), sizeDim3);
VERIFY_IS_EQUAL(chip4.dimension(3), sizeDim5);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim3; ++k) {
for (IndexType l = 0; l < sizeDim5; ++l) {
VERIFY_IS_EQUAL(chip4(i,j,k,l), tensor(i,j,k,5l,l));
}
}
}
}
array<IndexType, 4> chip5TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4}};
Tensor<DataType, 4, DataLayout,IndexType> chip5(chip5TensorRange);
const size_t chip5TensorBuffSize =chip5.size()*sizeof(DataType);
DataType* gpu_data_chip5 = static_cast<DataType*>(sycl_device.allocate(chip5TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip5(gpu_data_chip5, chip5TensorRange);
gpu_chip5.device(sycl_device)=gpu_tensor.chip(7l,4l);
sycl_device.memcpyDeviceToHost(chip5.data(), gpu_data_chip5, chip5TensorBuffSize);
VERIFY_IS_EQUAL(chip5.dimension(0), sizeDim1);
VERIFY_IS_EQUAL(chip5.dimension(1), sizeDim2);
VERIFY_IS_EQUAL(chip5.dimension(2), sizeDim3);
VERIFY_IS_EQUAL(chip5.dimension(3), sizeDim4);
for (IndexType i = 0; i < sizeDim1; ++i) {
for (IndexType j = 0; j < sizeDim2; ++j) {
for (IndexType k = 0; k < sizeDim3; ++k) {
for (IndexType l = 0; l < sizeDim4; ++l) {
VERIFY_IS_EQUAL(chip5(i,j,k,l), tensor(i,j,k,l,7l));
}
}
}
}
sycl_device.deallocate(gpu_data_tensor);
sycl_device.deallocate(gpu_data_chip1);
sycl_device.deallocate(gpu_data_chip2);
sycl_device.deallocate(gpu_data_chip3);
sycl_device.deallocate(gpu_data_chip4);
sycl_device.deallocate(gpu_data_chip5);
}
template <typename DataType, int DataLayout, typename IndexType>
static void test_chip_in_expr(const Eigen::SyclDevice& sycl_device) {
IndexType sizeDim1 = 2;
IndexType sizeDim2 = 3;
IndexType sizeDim3 = 5;
IndexType sizeDim4 = 7;
IndexType sizeDim5 = 11;
array<IndexType, 5> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
array<IndexType, 4> chip1TensorRange = {{sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 5, DataLayout,IndexType> tensor(tensorRange);
Tensor<DataType, 4, DataLayout,IndexType> chip1(chip1TensorRange);
Tensor<DataType, 4, DataLayout,IndexType> tensor1(chip1TensorRange);
tensor.setRandom();
tensor1.setRandom();
const size_t tensorBuffSize =tensor.size()*sizeof(DataType);
const size_t chip1TensorBuffSize =chip1.size()*sizeof(DataType);
DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
DataType* gpu_data_chip1 = static_cast<DataType*>(sycl_device.allocate(chip1TensorBuffSize));
DataType* gpu_data_tensor1 = static_cast<DataType*>(sycl_device.allocate(chip1TensorBuffSize));
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange);
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_chip1(gpu_data_chip1, chip1TensorRange);
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_tensor1(gpu_data_tensor1, chip1TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_tensor, tensor.data(), tensorBuffSize);
sycl_device.memcpyHostToDevice(gpu_data_tensor1, tensor1.data(), chip1TensorBuffSize);
gpu_chip1.device(sycl_device)=gpu_tensor.template chip<0l>(0l) + gpu_tensor1;
sycl_device.memcpyDeviceToHost(chip1.data(), gpu_data_chip1, chip1TensorBuffSize);
for (int i = 0; i < sizeDim2; ++i) {
for (int j = 0; j < sizeDim3; ++j) {
for (int k = 0; k < sizeDim4; ++k) {
for (int l = 0; l < sizeDim5; ++l) {
float expected = tensor(0l,i,j,k,l) + tensor1(i,j,k,l);
VERIFY_IS_EQUAL(chip1(i,j,k,l), expected);
}
}
}
}
array<IndexType, 3> chip2TensorRange = {{sizeDim2, sizeDim4, sizeDim5}};
Tensor<DataType, 3, DataLayout,IndexType> tensor2(chip2TensorRange);
Tensor<DataType, 3, DataLayout,IndexType> chip2(chip2TensorRange);
tensor2.setRandom();
const size_t chip2TensorBuffSize =tensor2.size()*sizeof(DataType);
DataType* gpu_data_tensor2 = static_cast<DataType*>(sycl_device.allocate(chip2TensorBuffSize));
DataType* gpu_data_chip2 = static_cast<DataType*>(sycl_device.allocate(chip2TensorBuffSize));
TensorMap<Tensor<DataType, 3, DataLayout,IndexType>> gpu_tensor2(gpu_data_tensor2, chip2TensorRange);
TensorMap<Tensor<DataType, 3, DataLayout,IndexType>> gpu_chip2(gpu_data_chip2, chip2TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_tensor2, tensor2.data(), chip2TensorBuffSize);
gpu_chip2.device(sycl_device)=gpu_tensor.template chip<0l>(0l).template chip<1l>(2l) + gpu_tensor2;
sycl_device.memcpyDeviceToHost(chip2.data(), gpu_data_chip2, chip2TensorBuffSize);
for (int i = 0; i < sizeDim2; ++i) {
for (int j = 0; j < sizeDim4; ++j) {
for (int k = 0; k < sizeDim5; ++k) {
float expected = tensor(0l,i,2l,j,k) + tensor2(i,j,k);
VERIFY_IS_EQUAL(chip2(i,j,k), expected);
}
}
}
sycl_device.deallocate(gpu_data_tensor);
sycl_device.deallocate(gpu_data_tensor1);
sycl_device.deallocate(gpu_data_chip1);
sycl_device.deallocate(gpu_data_tensor2);
sycl_device.deallocate(gpu_data_chip2);
}
template <typename DataType, int DataLayout, typename IndexType>
static void test_chip_as_lvalue_sycl(const Eigen::SyclDevice& sycl_device)
{
IndexType sizeDim1 = 2;
IndexType sizeDim2 = 3;
IndexType sizeDim3 = 5;
IndexType sizeDim4 = 7;
IndexType sizeDim5 = 11;
array<IndexType, 5> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
array<IndexType, 4> input2TensorRange = {{sizeDim2, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 5, DataLayout,IndexType> tensor(tensorRange);
Tensor<DataType, 5, DataLayout,IndexType> input1(tensorRange);
Tensor<DataType, 4, DataLayout,IndexType> input2(input2TensorRange);
input1.setRandom();
input2.setRandom();
const size_t tensorBuffSize =tensor.size()*sizeof(DataType);
const size_t input2TensorBuffSize =input2.size()*sizeof(DataType);
DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
DataType* gpu_data_input1 = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
DataType* gpu_data_input2 = static_cast<DataType*>(sycl_device.allocate(input2TensorBuffSize));
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange);
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_input1(gpu_data_input1, tensorRange);
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_input2(gpu_data_input2, input2TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input1, input1.data(), tensorBuffSize);
gpu_tensor.device(sycl_device)=gpu_input1;
sycl_device.memcpyHostToDevice(gpu_data_input2, input2.data(), input2TensorBuffSize);
gpu_tensor.template chip<0l>(1l).device(sycl_device)=gpu_input2;
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k < sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (i != 1) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input2(j,k,l,m));
}
}
}
}
}
}
gpu_tensor.device(sycl_device)=gpu_input1;
array<IndexType, 4> input3TensorRange = {{sizeDim1, sizeDim3, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> input3(input3TensorRange);
input3.setRandom();
const size_t input3TensorBuffSize =input3.size()*sizeof(DataType);
DataType* gpu_data_input3 = static_cast<DataType*>(sycl_device.allocate(input3TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_input3(gpu_data_input3, input3TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input3, input3.data(), input3TensorBuffSize);
gpu_tensor.template chip<1l>(1l).device(sycl_device)=gpu_input3;
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k <sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (j != 1) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input3(i,k,l,m));
}
}
}
}
}
}
gpu_tensor.device(sycl_device)=gpu_input1;
array<IndexType, 4> input4TensorRange = {{sizeDim1, sizeDim2, sizeDim4, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> input4(input4TensorRange);
input4.setRandom();
const size_t input4TensorBuffSize =input4.size()*sizeof(DataType);
DataType* gpu_data_input4 = static_cast<DataType*>(sycl_device.allocate(input4TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_input4(gpu_data_input4, input4TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input4, input4.data(), input4TensorBuffSize);
gpu_tensor.template chip<2l>(3l).device(sycl_device)=gpu_input4;
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k <sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (k != 3) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input4(i,j,l,m));
}
}
}
}
}
}
gpu_tensor.device(sycl_device)=gpu_input1;
array<IndexType, 4> input5TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim5}};
Tensor<DataType, 4, DataLayout,IndexType> input5(input5TensorRange);
input5.setRandom();
const size_t input5TensorBuffSize =input5.size()*sizeof(DataType);
DataType* gpu_data_input5 = static_cast<DataType*>(sycl_device.allocate(input5TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_input5(gpu_data_input5, input5TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input5, input5.data(), input5TensorBuffSize);
gpu_tensor.template chip<3l>(4l).device(sycl_device)=gpu_input5;
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k <sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (l != 4) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input5(i,j,k,m));
}
}
}
}
}
}
gpu_tensor.device(sycl_device)=gpu_input1;
array<IndexType, 4> input6TensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4}};
Tensor<DataType, 4, DataLayout,IndexType> input6(input6TensorRange);
input6.setRandom();
const size_t input6TensorBuffSize =input6.size()*sizeof(DataType);
DataType* gpu_data_input6 = static_cast<DataType*>(sycl_device.allocate(input6TensorBuffSize));
TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_input6(gpu_data_input6, input6TensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input6, input6.data(), input6TensorBuffSize);
gpu_tensor.template chip<4l>(5l).device(sycl_device)=gpu_input6;
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k <sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (m != 5) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input6(i,j,k,l));
}
}
}
}
}
}
gpu_tensor.device(sycl_device)=gpu_input1;
Tensor<DataType, 5, DataLayout,IndexType> input7(tensorRange);
input7.setRandom();
DataType* gpu_data_input7 = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_input7(gpu_data_input7, tensorRange);
sycl_device.memcpyHostToDevice(gpu_data_input7, input7.data(), tensorBuffSize);
gpu_tensor.chip(0l,0l).device(sycl_device)=gpu_input7.chip(0l,0l);
sycl_device.memcpyDeviceToHost(tensor.data(), gpu_data_tensor, tensorBuffSize);
for (int i = 0; i < sizeDim1; ++i) {
for (int j = 0; j < sizeDim2; ++j) {
for (int k = 0; k <sizeDim3; ++k) {
for (int l = 0; l < sizeDim4; ++l) {
for (int m = 0; m < sizeDim5; ++m) {
if (i != 0) {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input1(i,j,k,l,m));
} else {
VERIFY_IS_EQUAL(tensor(i,j,k,l,m), input7(i,j,k,l,m));
}
}
}
}
}
}
sycl_device.deallocate(gpu_data_tensor);
sycl_device.deallocate(gpu_data_input1);
sycl_device.deallocate(gpu_data_input2);
sycl_device.deallocate(gpu_data_input3);
sycl_device.deallocate(gpu_data_input4);
sycl_device.deallocate(gpu_data_input5);
sycl_device.deallocate(gpu_data_input6);
sycl_device.deallocate(gpu_data_input7);
}
template<typename DataType, typename dev_Selector> void sycl_chipping_test_per_device(dev_Selector s){
QueueInterface queueInterface(s);
auto sycl_device = Eigen::SyclDevice(&queueInterface);
test_static_chip_sycl<DataType, RowMajor, int64_t>(sycl_device);
test_static_chip_sycl<DataType, ColMajor, int64_t>(sycl_device);
test_dynamic_chip_sycl<DataType, RowMajor, int64_t>(sycl_device);
test_dynamic_chip_sycl<DataType, ColMajor, int64_t>(sycl_device);
test_chip_in_expr<DataType, RowMajor, int64_t>(sycl_device);
test_chip_in_expr<DataType, ColMajor, int64_t>(sycl_device);
test_chip_as_lvalue_sycl<DataType, RowMajor, int64_t>(sycl_device);
test_chip_as_lvalue_sycl<DataType, ColMajor, int64_t>(sycl_device);
}
void test_cxx11_tensor_chipping_sycl()
{
for (const auto& device :Eigen::get_sycl_supported_devices()) {
CALL_SUBTEST(sycl_chipping_test_per_device<float>(device));
}
}