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Add half and quarter vector support to HVX architecture
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@ -378,10 +378,6 @@ using std::ptrdiff_t;
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#include "src/Core/arch/AVX512/GemmKernel.h"
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#include "src/Core/arch/AVX512/GemmKernel.h"
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#endif
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#endif
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#if defined(EIGEN_VECTORIZE_HVX)
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#include "src/Core/arch/HVX/GeneralBlockPanelKernel.h"
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#endif
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#include "src/Core/Select.h"
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#include "src/Core/Select.h"
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#include "src/Core/VectorwiseOp.h"
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#include "src/Core/VectorwiseOp.h"
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#include "src/Core/PartialReduxEvaluator.h"
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#include "src/Core/PartialReduxEvaluator.h"
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@ -1,41 +0,0 @@
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#ifndef EIGEN_HVX_GENERAL_BLOCK_KERNEL_H
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#define EIGEN_HVX_GENERAL_BLOCK_KERNEL_H
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// Only support 128B HVX now.
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// Floating-point operations are only supported since V68.
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#if defined __HVX__ && (__HVX_LENGTH__ == 128) && __HVX_ARCH__ >= 68
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namespace Eigen {
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namespace internal {
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template <bool ConjLhs_, bool ConjRhs_, int PacketSize_>
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class gebp_traits<float, float, ConjLhs_, ConjRhs_, Architecture::Target, PacketSize_>
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: public gebp_traits<float, float, ConjLhs_, ConjRhs_, Architecture::Generic, PacketSize_> {
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public:
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typedef Packet32qf AccPacket;
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EIGEN_STRONG_INLINE void initAcc(Packet32qf& p) { p = pzero<Packet32qf>(p); }
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template <typename LaneIdType>
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EIGEN_STRONG_INLINE void madd(const Packet32f& a, const Packet32f& b, Packet32qf& c, Packet32f& /*tmp*/,
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const LaneIdType&) const {
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c = pmadd_f32_to_qf32(a, b, c);
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}
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template <typename LaneIdType>
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EIGEN_STRONG_INLINE void madd(const Packet32f& a, const QuadPacket<Packet32f>& b, Packet32qf& c, Packet32f& tmp,
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const LaneIdType& lane) const {
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madd(a, b.get(lane), c, tmp, lane);
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}
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EIGEN_STRONG_INLINE void acc(const Packet32qf& c, const Packet32f& alpha, Packet32f& r) const {
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r = pmadd_qf32_to_f32(c, alpha, r);
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}
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};
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} // end namespace internal
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} // end namespace Eigen
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#endif // __HVX__ && (__HVX_LENGTH__ == 128) && __HVX_ARCH__ >= 68
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#endif // EIGEN_HVX_GENERAL_BLOCK_KERNEL_H
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