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https://gitlab.com/libeigen/eigen.git
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Merged in kmargar/eigen (pull request PR-87)
Extend NEON to add ARMv8 64-bit double support
This commit is contained in:
Konstantinos Margaritis
commit
79225db0b6
@ -231,6 +231,14 @@ if(NOT MSVC)
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message(STATUS "Enabling NEON in tests/examples")
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endif()
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option(EIGEN_TEST_NEON64 "Enable/Disable Neon in tests/examples" OFF)
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if(EIGEN_TEST_NEON64)
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set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS}")
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message(STATUS "Enabling NEON in tests/examples")
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endif()
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check_cxx_compiler_flag("-fopenmp" COMPILER_SUPPORT_OPENMP)
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if(COMPILER_SUPPORT_OPENMP)
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option(EIGEN_TEST_OPENMP "Enable/Disable OpenMP in tests/examples" OFF)
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@ -180,7 +180,7 @@
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#undef bool
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#undef vector
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#undef pixel
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#elif defined __ARM_NEON__
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#elif defined __ARM_NEON
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#define EIGEN_VECTORIZE
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#define EIGEN_VECTORIZE_NEON
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#include <arm_neon.h>
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@ -33,6 +33,7 @@ template<> struct packet_traits<std::complex<float> > : default_packet_traits
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Vectorizable = 1,
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AlignedOnScalar = 1,
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size = 2,
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HasHalfPacket = 0,
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HasAdd = 1,
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HasSub = 1,
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@ -88,7 +89,7 @@ template<> EIGEN_STRONG_INLINE Packet2cf pmul<Packet2cf>(const Packet2cf& a, con
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template<> EIGEN_STRONG_INLINE Packet2cf pand <Packet2cf>(const Packet2cf& a, const Packet2cf& b)
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{
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return Packet2cf(vreinterpretq_f32_u32(vorrq_u32(vreinterpretq_u32_f32(a.v),vreinterpretq_u32_f32(b.v))));
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return Packet2cf(vreinterpretq_f32_u32(vandq_u32(vreinterpretq_u32_f32(a.v),vreinterpretq_u32_f32(b.v))));
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}
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template<> EIGEN_STRONG_INLINE Packet2cf por <Packet2cf>(const Packet2cf& a, const Packet2cf& b)
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{
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@ -252,7 +253,7 @@ template<> struct conj_helper<Packet2cf, Packet2cf, true,true>
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template<> EIGEN_STRONG_INLINE Packet2cf pdiv<Packet2cf>(const Packet2cf& a, const Packet2cf& b)
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{
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// TODO optimize it for AltiVec
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// TODO optimize it for NEON
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Packet2cf res = conj_helper<Packet2cf,Packet2cf,false,true>().pmul(a,b);
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Packet4f s, rev_s;
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@ -265,11 +266,198 @@ template<> EIGEN_STRONG_INLINE Packet2cf pdiv<Packet2cf>(const Packet2cf& a, con
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EIGEN_DEVICE_FUNC inline void
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ptranspose(PacketBlock<Packet2cf,2>& kernel) {
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float32x4_t tmp = vcombine_f32(vget_high_f32(kernel.packet[0].v), vget_high_f32(kernel.packet[1].v));
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Packet4f tmp = vcombine_f32(vget_high_f32(kernel.packet[0].v), vget_high_f32(kernel.packet[1].v));
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kernel.packet[0].v = vcombine_f32(vget_low_f32(kernel.packet[0].v), vget_low_f32(kernel.packet[1].v));
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kernel.packet[1].v = tmp;
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}
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//---------- double ----------
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#ifdef __aarch64__
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static uint64x2_t p2ul_CONJ_XOR = EIGEN_INIT_NEON_PACKET2(0x0, 0x8000000000000000);
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struct Packet1cd
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{
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EIGEN_STRONG_INLINE Packet1cd() {}
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EIGEN_STRONG_INLINE explicit Packet1cd(const Packet2d& a) : v(a) {}
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Packet2d v;
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};
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template<> struct packet_traits<std::complex<double> > : default_packet_traits
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{
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typedef Packet1cd type;
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typedef Packet1cd half;
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enum {
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Vectorizable = 1,
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AlignedOnScalar = 0,
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size = 1,
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HasHalfPacket = 0,
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HasAdd = 1,
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HasSub = 1,
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HasMul = 1,
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HasDiv = 1,
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HasNegate = 1,
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HasAbs = 0,
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HasAbs2 = 0,
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HasMin = 0,
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HasMax = 0,
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HasSetLinear = 0
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};
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};
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template<> struct unpacket_traits<Packet1cd> { typedef std::complex<double> type; enum {size=1}; typedef Packet1cd half; };
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template<> EIGEN_STRONG_INLINE Packet1cd pload<Packet1cd>(const std::complex<double>* from) { EIGEN_DEBUG_ALIGNED_LOAD return Packet1cd(pload<Packet2d>((const double*)from)); }
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template<> EIGEN_STRONG_INLINE Packet1cd ploadu<Packet1cd>(const std::complex<double>* from) { EIGEN_DEBUG_UNALIGNED_LOAD return Packet1cd(ploadu<Packet2d>((const double*)from)); }
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template<> EIGEN_STRONG_INLINE Packet1cd pset1<Packet1cd>(const std::complex<double>& from)
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{ /* here we really have to use unaligned loads :( */ return ploadu<Packet1cd>(&from); }
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template<> EIGEN_STRONG_INLINE Packet1cd padd<Packet1cd>(const Packet1cd& a, const Packet1cd& b) { return Packet1cd(padd<Packet2d>(a.v,b.v)); }
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template<> EIGEN_STRONG_INLINE Packet1cd psub<Packet1cd>(const Packet1cd& a, const Packet1cd& b) { return Packet1cd(psub<Packet2d>(a.v,b.v)); }
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template<> EIGEN_STRONG_INLINE Packet1cd pnegate(const Packet1cd& a) { return Packet1cd(pnegate<Packet2d>(a.v)); }
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template<> EIGEN_STRONG_INLINE Packet1cd pconj(const Packet1cd& a) { return Packet1cd(vreinterpretq_f64_u64(veorq_u64(vreinterpretq_u64_f64(a.v), p2ul_CONJ_XOR))); }
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template<> EIGEN_STRONG_INLINE Packet1cd pmul<Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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Packet2d v1, v2;
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// Get the real values of a
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v1 = vdupq_lane_f64(vget_low_f64(a.v), 0);
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// Get the real values of a
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v2 = vdupq_lane_f64(vget_high_f64(a.v), 1);
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// Multiply the real a with b
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v1 = vmulq_f64(v1, b.v);
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// Multiply the imag a with b
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v2 = vmulq_f64(v2, b.v);
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// Conjugate v2
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v2 = vreinterpretq_f64_u64(veorq_u64(vreinterpretq_u64_f64(v2), p2ul_CONJ_XOR));
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// Swap real/imag elements in v2.
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v2 = preverse<Packet2d>(v2);
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// Add and return the result
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return Packet1cd(vaddq_f64(v1, v2));
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}
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template<> EIGEN_STRONG_INLINE Packet1cd pand <Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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return Packet1cd(vreinterpretq_f64_u64(vandq_u64(vreinterpretq_u64_f64(a.v),vreinterpretq_u64_f64(b.v))));
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}
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template<> EIGEN_STRONG_INLINE Packet1cd por <Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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return Packet1cd(vreinterpretq_f64_u64(vorrq_u64(vreinterpretq_u64_f64(a.v),vreinterpretq_u64_f64(b.v))));
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}
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template<> EIGEN_STRONG_INLINE Packet1cd pxor <Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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return Packet1cd(vreinterpretq_f64_u64(veorq_u64(vreinterpretq_u64_f64(a.v),vreinterpretq_u64_f64(b.v))));
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}
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template<> EIGEN_STRONG_INLINE Packet1cd pandnot<Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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return Packet1cd(vreinterpretq_f64_u64(vbicq_u64(vreinterpretq_u64_f64(a.v),vreinterpretq_u64_f64(b.v))));
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}
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template<> EIGEN_STRONG_INLINE Packet1cd ploaddup<Packet1cd>(const std::complex<double>* from) { return pset1<Packet1cd>(*from); }
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template<> EIGEN_STRONG_INLINE void pstore <std::complex<double> >(std::complex<double> * to, const Packet1cd& from) { EIGEN_DEBUG_ALIGNED_STORE pstore((double*)to, from.v); }
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template<> EIGEN_STRONG_INLINE void pstoreu<std::complex<double> >(std::complex<double> * to, const Packet1cd& from) { EIGEN_DEBUG_UNALIGNED_STORE pstoreu((double*)to, from.v); }
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template<> EIGEN_STRONG_INLINE void prefetch<std::complex<double> >(const std::complex<double> * addr) { EIGEN_ARM_PREFETCH((double *)addr); }
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template<> EIGEN_DEVICE_FUNC inline Packet1cd pgather<std::complex<double>, Packet1cd>(const std::complex<double>* from, DenseIndex stride)
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{
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Packet2d res;
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res = vsetq_lane_f64(std::real(from[0*stride]), res, 0);
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res = vsetq_lane_f64(std::imag(from[0*stride]), res, 1);
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return Packet1cd(res);
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}
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template<> EIGEN_DEVICE_FUNC inline void pscatter<std::complex<double>, Packet1cd>(std::complex<double>* to, const Packet1cd& from, DenseIndex stride)
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{
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to[stride*0] = std::complex<double>(vgetq_lane_f64(from.v, 0), vgetq_lane_f64(from.v, 1));
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}
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template<> EIGEN_STRONG_INLINE std::complex<double> pfirst<Packet1cd>(const Packet1cd& a)
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{
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std::complex<double> EIGEN_ALIGN16 res;
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pstore<std::complex<double> >(&res, a);
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return res;
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}
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template<> EIGEN_STRONG_INLINE Packet1cd preverse(const Packet1cd& a) { return a; }
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template<> EIGEN_STRONG_INLINE std::complex<double> predux<Packet1cd>(const Packet1cd& a) { return pfirst(a); }
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template<> EIGEN_STRONG_INLINE Packet1cd preduxp<Packet1cd>(const Packet1cd* vecs) { return vecs[0]; }
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template<> EIGEN_STRONG_INLINE std::complex<double> predux_mul<Packet1cd>(const Packet1cd& a) { return pfirst(a); }
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template<int Offset>
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struct palign_impl<Offset,Packet1cd>
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{
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static EIGEN_STRONG_INLINE void run(Packet1cd& /*first*/, const Packet1cd& /*second*/)
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{
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// FIXME is it sure we never have to align a Packet1cd?
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// Even though a std::complex<double> has 16 bytes, it is not necessarily aligned on a 16 bytes boundary...
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}
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};
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template<> struct conj_helper<Packet1cd, Packet1cd, false,true>
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{
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EIGEN_STRONG_INLINE Packet1cd pmadd(const Packet1cd& x, const Packet1cd& y, const Packet1cd& c) const
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{ return padd(pmul(x,y),c); }
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EIGEN_STRONG_INLINE Packet1cd pmul(const Packet1cd& a, const Packet1cd& b) const
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{
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return internal::pmul(a, pconj(b));
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}
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};
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template<> struct conj_helper<Packet1cd, Packet1cd, true,false>
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{
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EIGEN_STRONG_INLINE Packet1cd pmadd(const Packet1cd& x, const Packet1cd& y, const Packet1cd& c) const
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{ return padd(pmul(x,y),c); }
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EIGEN_STRONG_INLINE Packet1cd pmul(const Packet1cd& a, const Packet1cd& b) const
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{
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return internal::pmul(pconj(a), b);
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}
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};
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template<> struct conj_helper<Packet1cd, Packet1cd, true,true>
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{
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EIGEN_STRONG_INLINE Packet1cd pmadd(const Packet1cd& x, const Packet1cd& y, const Packet1cd& c) const
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{ return padd(pmul(x,y),c); }
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EIGEN_STRONG_INLINE Packet1cd pmul(const Packet1cd& a, const Packet1cd& b) const
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{
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return pconj(internal::pmul(a, b));
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}
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};
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template<> EIGEN_STRONG_INLINE Packet1cd pdiv<Packet1cd>(const Packet1cd& a, const Packet1cd& b)
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{
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// TODO optimize it for NEON
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Packet1cd res = conj_helper<Packet1cd,Packet1cd,false,true>().pmul(a,b);
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Packet2d s = pmul<Packet2d>(b.v, b.v);
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Packet2d rev_s = preverse<Packet2d>(s);
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return Packet1cd(pdiv(res.v, padd<Packet2d>(s,rev_s)));
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}
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EIGEN_STRONG_INLINE Packet1cd pcplxflip/*<Packet1cd>*/(const Packet1cd& x)
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{
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return Packet1cd(preverse(Packet2d(x.v)));
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}
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EIGEN_STRONG_INLINE void ptranspose(PacketBlock<Packet1cd,2>& kernel)
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{
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Packet2d tmp = vcombine_f64(vget_high_f64(kernel.packet[0].v), vget_high_f64(kernel.packet[1].v));
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kernel.packet[0].v = vcombine_f64(vget_low_f64(kernel.packet[0].v), vget_low_f64(kernel.packet[1].v));
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kernel.packet[1].v = tmp;
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}
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#endif // __aarch64__
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} // end namespace internal
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@ -20,14 +20,24 @@ namespace internal {
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#define EIGEN_CACHEFRIENDLY_PRODUCT_THRESHOLD 8
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#endif
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#ifndef EIGEN_HAS_FUSED_MADD
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#define EIGEN_HAS_FUSED_MADD 1
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#endif
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#ifndef EIGEN_HAS_FUSE_CJMADD
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#define EIGEN_HAS_FUSE_CJMADD 1
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#endif
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// FIXME NEON has 16 quad registers, but since the current register allocator
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// is so bad, it is much better to reduce it to 8
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#ifndef EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS
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#define EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS 8
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#define EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS 16
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#endif
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typedef float32x2_t Packet2f;
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typedef float32x4_t Packet4f;
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typedef int32x4_t Packet4i;
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typedef int32x2_t Packet2i;
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typedef uint32x4_t Packet4ui;
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#define _EIGEN_DECLARE_CONST_Packet4f(NAME,X) \
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@ -66,11 +76,12 @@ typedef uint32x4_t Packet4ui;
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template<> struct packet_traits<float> : default_packet_traits
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{
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typedef Packet4f type;
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typedef Packet4f half;
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typedef Packet2f half;
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enum {
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Vectorizable = 1,
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AlignedOnScalar = 1,
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size = 4,
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HasHalfPacket=1,
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HasDiv = 1,
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// FIXME check the Has*
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@ -84,11 +95,12 @@ template<> struct packet_traits<float> : default_packet_traits
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template<> struct packet_traits<int> : default_packet_traits
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{
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typedef Packet4i type;
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typedef Packet4i half;
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typedef Packet2i half;
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enum {
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Vectorizable = 1,
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AlignedOnScalar = 1,
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size=4
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size=4,
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HasHalfPacket=1
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// FIXME check the Has*
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};
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};
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@ -136,6 +148,7 @@ template<> EIGEN_STRONG_INLINE Packet4i pmul<Packet4i>(const Packet4i& a, const
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template<> EIGEN_STRONG_INLINE Packet4f pdiv<Packet4f>(const Packet4f& a, const Packet4f& b)
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{
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#ifndef __aarch64__
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Packet4f inv, restep, div;
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// NEON does not offer a divide instruction, we have to do a reciprocal approximation
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@ -154,7 +167,11 @@ template<> EIGEN_STRONG_INLINE Packet4f pdiv<Packet4f>(const Packet4f& a, const
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div = vmulq_f32(a, inv);
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return div;
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#else
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return vdivq_f32(a,b);
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#endif
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}
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template<> EIGEN_STRONG_INLINE Packet4i pdiv<Packet4i>(const Packet4i& /*a*/, const Packet4i& /*b*/)
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{ eigen_assert(false && "packet integer division are not supported by NEON");
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return pset1<Packet4i>(0);
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@ -472,6 +489,165 @@ ptranspose(PacketBlock<Packet4i,4>& kernel) {
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kernel.packet[3] = vcombine_s32(vget_high_s32(tmp1.val[1]), vget_high_s32(tmp2.val[1]));
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}
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//---------- double ----------
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#ifdef __aarch64__
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typedef float64x2_t Packet2d;
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typedef float64x1_t Packet1d;
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template<> struct packet_traits<double> : default_packet_traits
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{
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typedef Packet2d type;
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typedef Packet1d half;
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enum {
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Vectorizable = 1,
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AlignedOnScalar = 1,
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size = 2,
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HasHalfPacket=1,
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HasDiv = 1,
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// FIXME check the Has*
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HasSin = 0,
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HasCos = 0,
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HasLog = 0,
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HasExp = 0,
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HasSqrt = 0
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};
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};
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template<> struct unpacket_traits<Packet2d> { typedef double type; enum {size=2}; typedef Packet2d half; };
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template<> EIGEN_STRONG_INLINE Packet2d pset1<Packet2d>(const double& from) { return vdupq_n_f64(from); }
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template<> EIGEN_STRONG_INLINE Packet2d plset<double>(const double& a)
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{
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Packet2d countdown = EIGEN_INIT_NEON_PACKET2(0, 1);
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return vaddq_f64(pset1<Packet2d>(a), countdown);
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}
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template<> EIGEN_STRONG_INLINE Packet2d padd<Packet2d>(const Packet2d& a, const Packet2d& b) { return vaddq_f64(a,b); }
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template<> EIGEN_STRONG_INLINE Packet2d psub<Packet2d>(const Packet2d& a, const Packet2d& b) { return vsubq_f64(a,b); }
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template<> EIGEN_STRONG_INLINE Packet2d pnegate(const Packet2d& a) { return vnegq_f64(a); }
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template<> EIGEN_STRONG_INLINE Packet2d pconj(const Packet2d& a) { return a; }
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template<> EIGEN_STRONG_INLINE Packet2d pmul<Packet2d>(const Packet2d& a, const Packet2d& b) { return vmulq_f64(a,b); }
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template<> EIGEN_STRONG_INLINE Packet2d pdiv<Packet2d>(const Packet2d& a, const Packet2d& b) { return vdivq_f64(a,b); }
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// for some weird raisons, it has to be overloaded for packet of integers
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template<> EIGEN_STRONG_INLINE Packet2d pmadd(const Packet2d& a, const Packet2d& b, const Packet2d& c) { return vmlaq_f64(c,a,b); }
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template<> EIGEN_STRONG_INLINE Packet2d pmin<Packet2d>(const Packet2d& a, const Packet2d& b) { return vminq_f64(a,b); }
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template<> EIGEN_STRONG_INLINE Packet2d pmax<Packet2d>(const Packet2d& a, const Packet2d& b) { return vmaxq_f64(a,b); }
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||||
|
||||
// Logical Operations are not supported for float, so we have to reinterpret casts using NEON intrinsics
|
||||
template<> EIGEN_STRONG_INLINE Packet2d pand<Packet2d>(const Packet2d& a, const Packet2d& b)
|
||||
{
|
||||
return vreinterpretq_f64_u64(vandq_u64(vreinterpretq_u64_f64(a),vreinterpretq_u64_f64(b)));
|
||||
}
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d por<Packet2d>(const Packet2d& a, const Packet2d& b)
|
||||
{
|
||||
return vreinterpretq_f64_u64(vorrq_u64(vreinterpretq_u64_f64(a),vreinterpretq_u64_f64(b)));
|
||||
}
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d pxor<Packet2d>(const Packet2d& a, const Packet2d& b)
|
||||
{
|
||||
return vreinterpretq_f64_u64(veorq_u64(vreinterpretq_u64_f64(a),vreinterpretq_u64_f64(b)));
|
||||
}
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d pandnot<Packet2d>(const Packet2d& a, const Packet2d& b)
|
||||
{
|
||||
return vreinterpretq_f64_u64(vbicq_u64(vreinterpretq_u64_f64(a),vreinterpretq_u64_f64(b)));
|
||||
}
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d pload<Packet2d>(const double* from) { EIGEN_DEBUG_ALIGNED_LOAD return vld1q_f64(from); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d ploadu<Packet2d>(const double* from) { EIGEN_DEBUG_UNALIGNED_LOAD return vld1q_f64(from); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d ploaddup<Packet2d>(const double* from)
|
||||
{
|
||||
return vld1q_dup_f64(from);
|
||||
}
|
||||
template<> EIGEN_STRONG_INLINE void pstore<double>(double* to, const Packet2d& from) { EIGEN_DEBUG_ALIGNED_STORE vst1q_f64(to, from); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE void pstoreu<double>(double* to, const Packet2d& from) { EIGEN_DEBUG_UNALIGNED_STORE vst1q_f64(to, from); }
|
||||
|
||||
template<> EIGEN_DEVICE_FUNC inline Packet2d pgather<double, Packet2d>(const double* from, DenseIndex stride)
|
||||
{
|
||||
Packet2d res;
|
||||
res = vsetq_lane_f64(from[0*stride], res, 0);
|
||||
res = vsetq_lane_f64(from[1*stride], res, 1);
|
||||
return res;
|
||||
}
|
||||
template<> EIGEN_DEVICE_FUNC inline void pscatter<double, Packet2d>(double* to, const Packet2d& from, DenseIndex stride)
|
||||
{
|
||||
to[stride*0] = vgetq_lane_f64(from, 0);
|
||||
to[stride*1] = vgetq_lane_f64(from, 1);
|
||||
}
|
||||
template<> EIGEN_STRONG_INLINE void prefetch<double>(const double* addr) { EIGEN_ARM_PREFETCH(addr); }
|
||||
|
||||
// FIXME only store the 2 first elements ?
|
||||
template<> EIGEN_STRONG_INLINE double pfirst<Packet2d>(const Packet2d& a) { return vgetq_lane_f64(a, 0); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d preverse(const Packet2d& a) { return vcombine_f64(vget_high_f64(a), vget_low_f64(a)); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d pabs(const Packet2d& a) { return vabsq_f64(a); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE double predux<Packet2d>(const Packet2d& a) { return vget_low_f64(a) + vget_high_f64(a); }
|
||||
|
||||
template<> EIGEN_STRONG_INLINE Packet2d preduxp<Packet2d>(const Packet2d* vecs)
|
||||
{
|
||||
float64x2_t trn1, trn2;
|
||||
|
||||
// NEON zip performs interleaving of the supplied vectors.
|
||||
// We perform two interleaves in a row to acquire the transposed vector
|
||||
trn1 = vzip1q_f64(vecs[0], vecs[1]);
|
||||
trn2 = vzip2q_f64(vecs[0], vecs[1]);
|
||||
|
||||
// Do the addition of the resulting vectors
|
||||
return vaddq_f64(trn1, trn2);
|
||||
}
|
||||
// Other reduction functions:
|
||||
// mul
|
||||
template<> EIGEN_STRONG_INLINE double predux_mul<Packet2d>(const Packet2d& a) { return vget_low_f64(a) * vget_high_f64(a); }
|
||||
|
||||
// min
|
||||
template<> EIGEN_STRONG_INLINE double predux_min<Packet2d>(const Packet2d& a) { return vgetq_lane_f64(vpminq_f64(a, a), 0); }
|
||||
|
||||
// max
|
||||
template<> EIGEN_STRONG_INLINE double predux_max<Packet2d>(const Packet2d& a) { return vgetq_lane_f64(vpmaxq_f64(a, a), 0); }
|
||||
|
||||
// this PALIGN_NEON business is to work around a bug in LLVM Clang 3.0 causing incorrect compilation errors,
|
||||
// see bug 347 and this LLVM bug: http://llvm.org/bugs/show_bug.cgi?id=11074
|
||||
#define PALIGN_NEON(Offset,Type,Command) \
|
||||
template<>\
|
||||
struct palign_impl<Offset,Type>\
|
||||
{\
|
||||
EIGEN_STRONG_INLINE static void run(Type& first, const Type& second)\
|
||||
{\
|
||||
if (Offset!=0)\
|
||||
first = Command(first, second, Offset);\
|
||||
}\
|
||||
};\
|
||||
|
||||
PALIGN_NEON(0,Packet2d,vextq_f64)
|
||||
PALIGN_NEON(1,Packet2d,vextq_f64)
|
||||
#undef PALIGN_NEON
|
||||
|
||||
EIGEN_DEVICE_FUNC inline void
|
||||
ptranspose(PacketBlock<Packet2d,2>& kernel) {
|
||||
float64x2_t trn1 = vzip1q_f64(kernel.packet[0], kernel.packet[1]);
|
||||
float64x2_t trn2 = vzip2q_f64(kernel.packet[0], kernel.packet[1]);
|
||||
|
||||
kernel.packet[0] = trn1;
|
||||
kernel.packet[1] = trn2;
|
||||
}
|
||||
#endif // __aarch64__
|
||||
|
||||
} // end namespace internal
|
||||
|
||||
} // end namespace Eigen
|
||||
|
||||
@ -294,6 +294,12 @@ macro(ei_testing_print_summary)
|
||||
message(STATUS "ARM NEON: Using architecture defaults")
|
||||
endif()
|
||||
|
||||
if(EIGEN_TEST_NEON64)
|
||||
message(STATUS "ARMv8 NEON: ON")
|
||||
else()
|
||||
message(STATUS "ARMv8 NEON: Using architecture defaults")
|
||||
endif()
|
||||
|
||||
endif() # vectorization / alignment options
|
||||
|
||||
message(STATUS "\n${EIGEN_TESTING_SUMMARY}")
|
||||
@ -424,6 +430,8 @@ macro(ei_get_cxxflags VAR)
|
||||
ei_is_64bit_env(IS_64BIT_ENV)
|
||||
if(EIGEN_TEST_NEON)
|
||||
set(${VAR} NEON)
|
||||
elseif(EIGEN_TEST_NEON64)
|
||||
set(${VAR} NEON)
|
||||
elseif(EIGEN_TEST_VSX)
|
||||
set(${VAR} VSX)
|
||||
elseif(EIGEN_TEST_ALTIVEC)
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user