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bug #1515: disable gebp's 3pX4 micro kernel for MSVC<=19.14 because of register spilling.
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@ -370,10 +370,12 @@ public:
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// register block size along the M direction (currently, this one cannot be modified)
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default_mr = (EIGEN_PLAIN_ENUM_MIN(16,NumberOfRegisters)/2/nr)*LhsPacketSize,
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#if defined(EIGEN_HAS_SINGLE_INSTRUCTION_MADD) && !defined(EIGEN_VECTORIZE_ALTIVEC) && !defined(EIGEN_VECTORIZE_VSX)
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#if defined(EIGEN_HAS_SINGLE_INSTRUCTION_MADD) && !defined(EIGEN_VECTORIZE_ALTIVEC) && !defined(EIGEN_VECTORIZE_VSX) \
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&& ((!EIGEN_COMP_MSVC) || (EIGEN_COMP_MSVC>=1914))
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// we assume 16 registers
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// See bug 992, if the scalar type is not vectorizable but that EIGEN_HAS_SINGLE_INSTRUCTION_MADD is defined,
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// then using 3*LhsPacketSize triggers non-implemented paths in syrk.
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// Bug 1515: MSVC prior to v19.14 yields to register spilling.
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mr = Vectorizable ? 3*LhsPacketSize : default_mr,
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#else
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mr = default_mr,
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