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prefetch are noops on VSX
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c0205ca4af
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@ -28,7 +28,7 @@ namespace internal {
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// NOTE Altivec has 32 registers, but Eigen only accepts a value of 8 or 16
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// NOTE Altivec has 32 registers, but Eigen only accepts a value of 8 or 16
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#ifndef EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS
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#ifndef EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS
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#define EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS 16
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#define EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS 32
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#endif
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#endif
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typedef __vector float Packet4f;
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typedef __vector float Packet4f;
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@ -482,8 +482,16 @@ template<> EIGEN_STRONG_INLINE void pstoreu<float>(float* to, const Packet4f&
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}
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}
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#endif
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#endif
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template<> EIGEN_STRONG_INLINE void prefetch<float>(const float* addr) { vec_dstt(addr, DST_CTRL(2,2,32), DST_CHAN); }
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template<> EIGEN_STRONG_INLINE void prefetch<float>(const float* addr) {
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template<> EIGEN_STRONG_INLINE void prefetch<int>(const int* addr) { vec_dstt(addr, DST_CTRL(2,2,32), DST_CHAN); }
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#ifndef __VSX__
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vec_dstt(addr, DST_CTRL(2,2,32), DST_CHAN);
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#endif
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}
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template<> EIGEN_STRONG_INLINE void prefetch<int>(const int* addr) {
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#ifndef __VSX__
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vec_dstt(addr, DST_CTRL(2,2,32), DST_CHAN);
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#endif
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}
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template<> EIGEN_STRONG_INLINE float pfirst<Packet4f>(const Packet4f& a) { float EIGEN_ALIGN16 x[4]; vec_st(a, 0, x); return x[0]; }
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template<> EIGEN_STRONG_INLINE float pfirst<Packet4f>(const Packet4f& a) { float EIGEN_ALIGN16 x[4]; vec_st(a, 0, x); return x[0]; }
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template<> EIGEN_STRONG_INLINE int pfirst<Packet4i>(const Packet4i& a) { int EIGEN_ALIGN16 x[4]; vec_st(a, 0, x); return x[0]; }
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template<> EIGEN_STRONG_INLINE int pfirst<Packet4i>(const Packet4i& a) { int EIGEN_ALIGN16 x[4]; vec_st(a, 0, x); return x[0]; }
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