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Remove custom unaligned loads for SSE. They were only useful for core2 CPU.
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@ -314,58 +314,27 @@ template<> EIGEN_STRONG_INLINE Packet4i pload<Packet4i>(const int* from) { E
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return _mm_loadu_ps(from);
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#endif
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}
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template<> EIGEN_STRONG_INLINE Packet2d ploadu<Packet2d>(const double* from) { EIGEN_DEBUG_UNALIGNED_LOAD return _mm_loadu_pd(from); }
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template<> EIGEN_STRONG_INLINE Packet4i ploadu<Packet4i>(const int* from) { EIGEN_DEBUG_UNALIGNED_LOAD return _mm_loadu_si128(reinterpret_cast<const __m128i*>(from)); }
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#else
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// NOTE: with the code below, MSVC's compiler crashes!
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#if EIGEN_COMP_GNUC && (EIGEN_ARCH_i386 || (EIGEN_ARCH_x86_64 && EIGEN_GNUC_AT_LEAST(4, 8)))
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// bug 195: gcc/i386 emits weird x87 fldl/fstpl instructions for _mm_load_sd
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#define EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS 1
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#elif EIGEN_COMP_CLANG
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// bug 201: Segfaults in __mm_loadh_pd with clang 2.8
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#define EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS 1
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#else
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#define EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS 0
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#endif
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template<> EIGEN_STRONG_INLINE Packet4f ploadu<Packet4f>(const float* from)
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{
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EIGEN_DEBUG_UNALIGNED_LOAD
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#if EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS
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return _mm_loadu_ps(from);
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#else
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__m128d res;
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res = _mm_load_sd((const double*)(from)) ;
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res = _mm_loadh_pd(res, (const double*)(from+2)) ;
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return _mm_castpd_ps(res);
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#endif
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}
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#endif
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template<> EIGEN_STRONG_INLINE Packet2d ploadu<Packet2d>(const double* from)
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{
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EIGEN_DEBUG_UNALIGNED_LOAD
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#if EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS
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return _mm_loadu_pd(from);
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#else
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__m128d res;
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res = _mm_load_sd(from) ;
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res = _mm_loadh_pd(res,from+1);
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return res;
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#endif
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}
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template<> EIGEN_STRONG_INLINE Packet4i ploadu<Packet4i>(const int* from)
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{
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EIGEN_DEBUG_UNALIGNED_LOAD
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#if EIGEN_AVOID_CUSTOM_UNALIGNED_LOADS
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return _mm_loadu_si128(reinterpret_cast<const __m128i*>(from));
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#else
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__m128d res;
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res = _mm_load_sd((const double*)(from)) ;
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res = _mm_loadh_pd(res, (const double*)(from+2)) ;
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return _mm_castpd_si128(res);
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#endif
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}
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#endif
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template<> EIGEN_STRONG_INLINE Packet4f ploaddup<Packet4f>(const float* from)
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{
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