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This commit enables the use of Eigen on HIP kernels / AMD GPUs. Support has been added along the same lines as what already exists for using Eigen in CUDA kernels / NVidia GPUs. Application code needs to explicitly define EIGEN_USE_HIP when using Eigen in HIP kernels. This is because some of the CUDA headers get picked up by default during Eigen compile (irrespective of whether or not the underlying compiler is CUDACC/NVCC, for e.g. Eigen/src/Core/arch/CUDA/Half.h). In order to maintain this behavior, the EIGEN_USE_HIP macro is used to switch to using the HIP version of those header files (see Eigen/Core and unsupported/Eigen/CXX11/Tensor) Use the "-DEIGEN_TEST_HIP" cmake option to enable the HIP specific unit tests.
155 lines
5.3 KiB
Plaintext
155 lines
5.3 KiB
Plaintext
// This file is part of Eigen, a lightweight C++ template library
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// for linear algebra.
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//
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// Copyright (C) 2015 Benoit Steiner <benoit.steiner.goog@gmail.com>
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//
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// This Source Code Form is subject to the terms of the Mozilla
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// Public License v. 2.0. If a copy of the MPL was not distributed
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// with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
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#define EIGEN_TEST_NO_LONGDOUBLE
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#define EIGEN_TEST_NO_COMPLEX
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#define EIGEN_TEST_FUNC cxx11_tensor_reduction_hip
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#define EIGEN_USE_GPU
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#include "main.h"
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#include <unsupported/Eigen/CXX11/Tensor>
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template<typename Type, int DataLayout>
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static void test_full_reductions() {
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Eigen::HipStreamDevice stream;
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Eigen::GpuDevice gpu_device(&stream);
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const int num_rows = internal::random<int>(1024, 5*1024);
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const int num_cols = internal::random<int>(1024, 5*1024);
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Tensor<Type, 2, DataLayout> in(num_rows, num_cols);
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in.setRandom();
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Tensor<Type, 0, DataLayout> full_redux;
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full_redux = in.sum();
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std::size_t in_bytes = in.size() * sizeof(Type);
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std::size_t out_bytes = full_redux.size() * sizeof(Type);
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Type* gpu_in_ptr = static_cast<Type*>(gpu_device.allocate(in_bytes));
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Type* gpu_out_ptr = static_cast<Type*>(gpu_device.allocate(out_bytes));
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gpu_device.memcpyHostToDevice(gpu_in_ptr, in.data(), in_bytes);
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TensorMap<Tensor<Type, 2, DataLayout> > in_gpu(gpu_in_ptr, num_rows, num_cols);
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TensorMap<Tensor<Type, 0, DataLayout> > out_gpu(gpu_out_ptr);
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out_gpu.device(gpu_device) = in_gpu.sum();
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Tensor<Type, 0, DataLayout> full_redux_gpu;
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gpu_device.memcpyDeviceToHost(full_redux_gpu.data(), gpu_out_ptr, out_bytes);
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gpu_device.synchronize();
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// Check that the CPU and GPU reductions return the same result.
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VERIFY_IS_APPROX(full_redux(), full_redux_gpu());
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gpu_device.deallocate(gpu_in_ptr);
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gpu_device.deallocate(gpu_out_ptr);
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}
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template<typename Type, int DataLayout>
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static void test_first_dim_reductions() {
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int dim_x = 33;
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int dim_y = 1;
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int dim_z = 128;
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Tensor<Type, 3, DataLayout> in(dim_x, dim_y, dim_z);
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in.setRandom();
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Eigen::array<int, 1> red_axis;
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red_axis[0] = 0;
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Tensor<Type, 2, DataLayout> redux = in.sum(red_axis);
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// Create device
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Eigen::HipStreamDevice stream;
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Eigen::GpuDevice dev(&stream);
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// Create data(T)
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Type* in_data = (Type*)dev.allocate(dim_x*dim_y*dim_z*sizeof(Type));
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Type* out_data = (Type*)dev.allocate(dim_z*dim_y*sizeof(Type));
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Eigen::TensorMap<Eigen::Tensor<Type, 3, DataLayout> > gpu_in(in_data, dim_x, dim_y, dim_z);
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Eigen::TensorMap<Eigen::Tensor<Type, 2, DataLayout> > gpu_out(out_data, dim_y, dim_z);
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// Perform operation
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dev.memcpyHostToDevice(in_data, in.data(), in.size()*sizeof(Type));
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gpu_out.device(dev) = gpu_in.sum(red_axis);
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gpu_out.device(dev) += gpu_in.sum(red_axis);
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Tensor<Type, 2, DataLayout> redux_gpu(dim_y, dim_z);
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dev.memcpyDeviceToHost(redux_gpu.data(), out_data, gpu_out.size()*sizeof(Type));
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dev.synchronize();
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// Check that the CPU and GPU reductions return the same result.
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for (int i = 0; i < gpu_out.size(); ++i) {
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VERIFY_IS_APPROX(2*redux(i), redux_gpu(i));
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}
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dev.deallocate(in_data);
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dev.deallocate(out_data);
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}
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template<typename Type, int DataLayout>
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static void test_last_dim_reductions() {
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int dim_x = 128;
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int dim_y = 1;
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int dim_z = 33;
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Tensor<Type, 3, DataLayout> in(dim_x, dim_y, dim_z);
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in.setRandom();
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Eigen::array<int, 1> red_axis;
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red_axis[0] = 2;
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Tensor<Type, 2, DataLayout> redux = in.sum(red_axis);
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// Create device
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Eigen::HipStreamDevice stream;
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Eigen::GpuDevice dev(&stream);
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// Create data
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Type* in_data = (Type*)dev.allocate(dim_x*dim_y*dim_z*sizeof(Type));
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Type* out_data = (Type*)dev.allocate(dim_x*dim_y*sizeof(Type));
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Eigen::TensorMap<Eigen::Tensor<Type, 3, DataLayout> > gpu_in(in_data, dim_x, dim_y, dim_z);
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Eigen::TensorMap<Eigen::Tensor<Type, 2, DataLayout> > gpu_out(out_data, dim_x, dim_y);
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// Perform operation
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dev.memcpyHostToDevice(in_data, in.data(), in.size()*sizeof(Type));
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gpu_out.device(dev) = gpu_in.sum(red_axis);
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gpu_out.device(dev) += gpu_in.sum(red_axis);
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Tensor<Type, 2, DataLayout> redux_gpu(dim_x, dim_y);
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dev.memcpyDeviceToHost(redux_gpu.data(), out_data, gpu_out.size()*sizeof(Type));
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dev.synchronize();
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// Check that the CPU and GPU reductions return the same result.
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for (int i = 0; i < gpu_out.size(); ++i) {
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VERIFY_IS_APPROX(2*redux(i), redux_gpu(i));
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}
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dev.deallocate(in_data);
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dev.deallocate(out_data);
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}
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void test_cxx11_tensor_reduction_hip() {
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CALL_SUBTEST((test_full_reductions<float, ColMajor>()));
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CALL_SUBTEST((test_full_reductions<double, ColMajor>()));
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CALL_SUBTEST((test_full_reductions<float, RowMajor>()));
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CALL_SUBTEST((test_full_reductions<double, RowMajor>()));
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CALL_SUBTEST((test_first_dim_reductions<float, ColMajor>()));
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CALL_SUBTEST((test_first_dim_reductions<double, ColMajor>()));
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CALL_SUBTEST((test_first_dim_reductions<float, RowMajor>()));
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// Outer reductions of doubles aren't supported just yet.
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// CALL_SUBTEST((test_first_dim_reductions<double, RowMajor>()))
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CALL_SUBTEST((test_last_dim_reductions<float, ColMajor>()));
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// Outer reductions of doubles aren't supported just yet.
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// CALL_SUBTEST((test_last_dim_reductions<double, ColMajor>()));
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CALL_SUBTEST((test_last_dim_reductions<float, RowMajor>()));
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CALL_SUBTEST((test_last_dim_reductions<double, RowMajor>()));
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}
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