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Fix compilation of tiled evaluation code with c++03
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@ -396,8 +396,8 @@ struct TensorBlockCwiseUnaryOp {
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typedef const Eigen::Array<InputScalar, Dynamic, 1> Input;
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typedef Eigen::Array<OutputScalar, Dynamic, 1> Output;
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typedef Eigen::Map<Input, 0, InnerStride<>> InputMap;
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typedef Eigen::Map<Output, 0, InnerStride<>> OutputMap;
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typedef Eigen::Map<Input, 0, InnerStride<> > InputMap;
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typedef Eigen::Map<Output, 0, InnerStride<> > OutputMap;
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const InputScalar* input_base = &input_data[input_index];
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OutputScalar* output_base = &output_data[output_index];
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@ -502,7 +502,7 @@ struct TensorBlockCwiseUnaryIO {
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input_stride, input_data);
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// Update index.
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for (int j = 0; j < num_squeezed_dims; ++j) {
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auto& state = block_iter_state[j];
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BlockIteratorState& state = block_iter_state[j];
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if (++state.count < state.size) {
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output_index += state.output_stride;
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input_index += state.input_stride;
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@ -596,12 +596,11 @@ struct TensorEvaluator<const TensorBroadcastingOp<Broadcast, ArgType>, Device>
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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// TODO(wuke): Targeting L1 size is 30% faster than targeting L{-1} on large
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// tensors. But this might need further tuning.
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.firstLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kSkewedInnerDims,
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block_total_size_max));
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internal::kSkewedInnerDims, block_total_size_max));
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m_impl.getResourceRequirements(resources);
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}
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@ -617,8 +616,8 @@ struct TensorEvaluator<const TensorBroadcastingOp<Broadcast, ArgType>, Device>
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// equal to m_dimensions for inner dims, a smaller than m_dimensions[i] size
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// for the first outer dim, and 1 for other outer dims. This is guaranteed
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// by MergeResourceRequirements() in TensorBlock.h.
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const auto& output_block_sizes = output_block->block_sizes();
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const auto& output_block_strides = output_block->block_strides();
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const Dimensions& output_block_sizes = output_block->block_sizes();
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const Dimensions& output_block_strides = output_block->block_strides();
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// Find where outer dims start.
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int outer_dim_start = 0;
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@ -642,7 +641,7 @@ struct TensorEvaluator<const TensorBroadcastingOp<Broadcast, ArgType>, Device>
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return;
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}
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const auto& input_dims = m_impl.dimensions();
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const Dimensions& input_dims = m_impl.dimensions();
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// Pre-fill input_block_sizes, broadcast_block_sizes,
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// broadcast_block_strides, and broadcast_tensor_strides. Later on we will
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@ -290,11 +290,10 @@ struct TensorEvaluator<const TensorChippingOp<DimId, ArgType>, Device>
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void getResourceRequirements(
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.lastLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kSkewedInnerDims,
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block_total_size_max));
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internal::kSkewedInnerDims, block_total_size_max));
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m_impl.getResourceRequirements(resources);
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}
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@ -550,11 +550,10 @@ struct TensorEvaluator<const TensorImagePatchOp<Rows, Cols, ArgType>, Device>
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void getResourceRequirements(
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.lastLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kSkewedInnerDims,
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block_total_size_max));
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internal::kSkewedInnerDims, block_total_size_max));
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}
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void block(
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@ -677,11 +677,10 @@ struct TensorEvaluator<const TensorSlicingOp<StartIndices, Sizes, ArgType>, Devi
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void getResourceRequirements(
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.lastLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kSkewedInnerDims,
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block_total_size_max));
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internal::kSkewedInnerDims, block_total_size_max));
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m_impl.getResourceRequirements(resources);
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}
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@ -771,11 +771,10 @@ struct TensorEvaluator<const TensorReductionOp<Op, Dims, ArgType, MakePointer_>,
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void getResourceRequirements(
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.lastLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kSkewedInnerDims,
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block_total_size_max));
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internal::kSkewedInnerDims, block_total_size_max));
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m_impl.getResourceRequirements(resources);
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}
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@ -229,10 +229,10 @@ struct TensorEvaluator<const TensorShufflingOp<Shuffle, ArgType>, Device>
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void getResourceRequirements(
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std::vector<internal::TensorOpResourceRequirements>* resources) const {
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auto block_total_size_max = numext::maxi<Eigen::Index>(
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Eigen::Index block_total_size_max = numext::maxi<Eigen::Index>(
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1, m_device.firstLevelCacheSize() / sizeof(Scalar));
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resources->push_back(internal::TensorOpResourceRequirements(
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internal::TensorBlockShapeType::kUniformAllDims, block_total_size_max));
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internal::kUniformAllDims, block_total_size_max));
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m_impl.getResourceRequirements(resources);
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}
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@ -535,7 +535,7 @@ static void test_block_cwise_unary_io_basic() {
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DSizes<Index, NumDims> block_sizes = RandomDims<NumDims>();
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DSizes<Index, NumDims> strides(ComputeStrides<Layout, NumDims>(block_sizes));
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const auto total_size = block_sizes.TotalSize();
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const Index total_size = block_sizes.TotalSize();
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// Create a random input tensors.
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T* input_data = GenerateRandomData<T>(total_size);
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@ -562,12 +562,12 @@ static void test_block_cwise_unary_io_squeeze_ones() {
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DSizes<Index, 5> block_sizes(1, 2, 1, 3, 1);
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DSizes<Index, 5> strides(ComputeStrides<Layout, 5>(block_sizes));
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const auto total_size = block_sizes.TotalSize();
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const Index total_size = block_sizes.TotalSize();
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// Create a random input tensors.
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auto* input_data = GenerateRandomData<float>(total_size);
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float* input_data = GenerateRandomData<float>(total_size);
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auto* output_data = new float[total_size];
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float* output_data = new float[total_size];
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UnaryFunctor functor;
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TensorBlockCwiseUnaryIO::Run(functor, block_sizes, strides, output_data,
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strides, input_data);
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@ -599,13 +599,13 @@ static void test_block_cwise_unary_io_zero_strides() {
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input_strides[4] = 0;
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// Generate random data.
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auto* input_data = GenerateRandomData<float>(input_sizes.TotalSize());
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float* input_data = GenerateRandomData<float>(input_sizes.TotalSize());
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DSizes<Index, 5> output_sizes = rnd_dims;
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DSizes<Index, 5> output_strides(ComputeStrides<Layout, 5>(output_sizes));
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const auto output_total_size = output_sizes.TotalSize();
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auto* output_data = new float[output_total_size];
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const Index output_total_size = output_sizes.TotalSize();
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float* output_data = new float[output_total_size];
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UnaryFunctor functor;
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TensorBlockCwiseUnaryIO::Run(functor, output_sizes, output_strides,
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@ -81,12 +81,12 @@ static void test_expr_shuffling()
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Tensor<float, 4, DataLayout> expected;
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expected = tensor.shuffle(shuffles);
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Tensor<float, 4, DataLayout> result(5,7,3,2);
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Tensor<float, 4, DataLayout> result(5, 7, 3, 2);
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array<ptrdiff_t, 4> src_slice_dim{{2,3,1,7}};
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array<ptrdiff_t, 4> src_slice_start{{0,0,0,0}};
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array<ptrdiff_t, 4> dst_slice_dim{{1,7,3,2}};
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array<ptrdiff_t, 4> dst_slice_start{{0,0,0,0}};
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array<ptrdiff_t, 4> src_slice_dim({2, 3, 1, 7});
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array<ptrdiff_t, 4> src_slice_start({0, 0, 0, 0});
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array<ptrdiff_t, 4> dst_slice_dim({1, 7, 3, 2});
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array<ptrdiff_t, 4> dst_slice_start({0, 0, 0, 0});
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for (int i = 0; i < 5; ++i) {
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result.slice(dst_slice_start, dst_slice_dim) =
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